{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11966714","patent":{"patent_number":"US-11966714","title":"Ternary in-memory accelerator","assignee":null,"inventors":[],"filing_date":"2022-01-30T00:00:00.000Z","publication_date":"2024-04-23T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06N","G06N","G06N","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06N","G11C","G11C"],"num_claims":7,"abstract":"A circuit of cells used as a memory array and capable of in-memory arithmetic which includes a plurality of signed ternary processing, each signed ternary processing cell includes a first memory cell, adapted to hold a first digital value, a second memory cell, adapted to hold a second digital value, wherein a binary combination of the first digital value and the second digital value establishes a first signed ternary operand, a signed ternary input forming a second signed ternary operand, and a signed ternary output, wherein the signed ternary output represents a signed multiplication of the first signed ternary operand and the second signed ternary operand, a sense circuit adapted to output a subtraction result."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Ternary in-memory accelerator","description":"A circuit of cells used as a memory array and capable of in-memory arithmetic which includes a plurality of signed ternary processing, each signed ternary processing cell includes a first memory cell,","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11966714","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11966714","citation_suggestion":"Patentable. \"Ternary in-memory accelerator\" (US-11966714). https://patentable.app/patents/US-11966714","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11966714","json":"https://patentable.app/api/llm-context/US-11966714","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T06:59:55.141Z"}