{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11967356","patent":{"patent_number":"US-11967356","title":"Concurrent compensation in a memory system","assignee":null,"inventors":[],"filing_date":"2021-06-17T00:00:00.000Z","publication_date":"2024-04-23T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a memory cell array having a mat having a plurality of row sections that each include respective prime memory cell rows and a respective redundant memory cell row. The example apparatus may further include a row decoder configured to receive an access command and a prime row address. The row decoder may be configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Concurrent compensation in a memory system","description":"An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a memory cell array having a mat having ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11967356","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11967356","citation_suggestion":"Patentable. \"Concurrent compensation in a memory system\" (US-11967356). https://patentable.app/patents/US-11967356","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11967356","json":"https://patentable.app/api/llm-context/US-11967356","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:47:08.126Z"}