{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11971826","patent":{"patent_number":"US-11971826","title":"Architecture and data path options for compression of soft bit data in non-volatile memories","assignee":null,"inventors":[],"filing_date":"2021-12-21T00:00:00.000Z","publication_date":"2024-04-30T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"For a non-volatile memory that uses hard bit and a soft bit data in error correction operations, architectures are introduced for the compression of the soft bit data to reduce the amount of data transferred over the memory's input-output interface. For a memory device with multiple planes of memory cells, the internal global data bus is segmented and a data compression circuit associated with each segment. This allows soft bit data from a cache buffer of a plane using one segment to transfer data between the cache buffer and the associated compression circuit concurrently with transferring data from a cache buffer of another plane using another segment, either for compression or transfer to the input-output interface."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Architecture and data path options for compression of soft bit data in non-volatile memories","description":"For a non-volatile memory that uses hard bit and a soft bit data in error correction operations, architectures are introduced for the compression of the soft bit data to reduce the amount of data tran","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11971826","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11971826","citation_suggestion":"Patentable. \"Architecture and data path options for compression of soft bit data in non-volatile memories\" (US-11971826). https://patentable.app/patents/US-11971826","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11971826","json":"https://patentable.app/api/llm-context/US-11971826","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:57:33.456Z"}