{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11971832","patent":{"patent_number":"US-11971832","title":"Methods, devices and systems for high speed transactions with nonvolatile memory on a double data rate memory bus","assignee":null,"inventors":[],"filing_date":"2020-12-17T00:00:00.000Z","publication_date":"2024-04-30T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":13,"abstract":"A method can include: receiving a plurality of consecutive commands on a unidirectional command-address (CA) bus input of a discrete nonvolatile memory (NVM) device, the commands being synchronous with a timing clock; for each received command, determining if the command is an express read (NVR) command, if a command is determined to be an NVR command, determining if a next consecutive command is an NVR command, wherein consecutive NVR commands form an NVR command sequence; in response to the no more than the NVR command sequence, accessing read data stored in NVM cells of the NVM device; and driving the read data on parallel data input/outputs (I/Os) of the NVM device in a burst of data values, the data values of the burst being output in synchronism with rising and falling edges of the timing clock; wherein the CA bus input includes a plurality of parallel CA signal inputs. Related memory devices and systems are also disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods, devices and systems for high speed transactions with nonvolatile memory on a double data rate memory bus","description":"A method can include: receiving a plurality of consecutive commands on a unidirectional command-address (CA) bus input of a discrete nonvolatile memory (NVM) device, the commands being synchronous wit","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11971832","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11971832","citation_suggestion":"Patentable. \"Methods, devices and systems for high speed transactions with nonvolatile memory on a double data rate memory bus\" (US-11971832). https://patentable.app/patents/US-11971832","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11971832","json":"https://patentable.app/api/llm-context/US-11971832","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:19:48.728Z"}