{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11972978","patent":{"patent_number":"US-11972978","title":"Conductive via of integrated circuitry, memory array comprising strings of memory cells, method of forming a conductive via of integrated circuitry, and method of forming a memory array comprising strings of memory cells","assignee":null,"inventors":[],"filing_date":"2022-05-04T00:00:00.000Z","publication_date":"2024-04-30T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":11,"abstract":"A method used in forming a conductive via of integrated circuitry comprises forming a lining laterally over sidewalls of an elevationally-elongated opening. The lining comprises elemental-form silicon. The elemental-form silicon of an uppermost portion of the lining is ion implanted in the elevationally-elongated opening. The ion-implanted elemental-form silicon of the uppermost portion of the lining is etched selectively relative to the elemental-form silicon of a lower portion of the lining below the uppermost portion that was not subjected to said ion implanting. The elemental-form silicon of the lower portion of the lining is reacted with a metal halide to form elemental-form metal in a lower portion of the elevationally-elongated opening that is the metal from the metal halide. Conductive material in the elevationally-elongated opening is formed atop and directly against the elemental-form metal. Other embodiments, including structure independent of method, are disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Conductive via of integrated circuitry, memory array comprising strings of memory cells, method of forming a conductive via of integrated circuitry, and method of forming a memory array comprising strings of memory cells","description":"A method used in forming a conductive via of integrated circuitry comprises forming a lining laterally over sidewalls of an elevationally-elongated opening. The lining comprises elemental-form silicon","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11972978","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11972978","citation_suggestion":"Patentable. \"Conductive via of integrated circuitry, memory array comprising strings of memory cells, method of forming a conductive via of integrated circuitry, and method of forming a memory array comprising strings of memory cells\" (US-11972978). https://patentable.app/patents/US-11972978","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11972978","json":"https://patentable.app/api/llm-context/US-11972978","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T14:02:12.930Z"}