{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11973083","patent":{"patent_number":"US-11973083","title":"Method of making semiconductor device having buried bias pad","assignee":null,"inventors":[],"filing_date":"2022-05-10T00:00:00.000Z","publication_date":"2024-04-30T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"A method of making an integrated circuit includes surrounding a first bias pad with dielectric material of a buried oxide layer. The method includes adding dopants to a layer of semiconductor material over the first bias pad. The method includes depositing a gate dielectric and a gate electrode over a top surface of the layer of semiconductor material. The method includes etching the gate dielectric and the gate electrode to isolate a gate electrode over the layer of semiconductor material. The method includes depositing an inter layer dielectric (ILD) material over the gate electrode and the layer of semiconductor material. The method includes etching at least one bias contact opening down to the first bias pad. The method includes filling the at least one bias contact opening with a bias contact material. The method includes electrically connecting at least one bias contact to an interconnect structure of the semiconductor device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of making semiconductor device having buried bias pad","description":"A method of making an integrated circuit includes surrounding a first bias pad with dielectric material of a buried oxide layer. The method includes adding dopants to a layer of semiconductor material","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11973083","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11973083","citation_suggestion":"Patentable. \"Method of making semiconductor device having buried bias pad\" (US-11973083). https://patentable.app/patents/US-11973083","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11973083","json":"https://patentable.app/api/llm-context/US-11973083","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:55:46.180Z"}