{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11980022","patent":{"patent_number":"US-11980022","title":"Memory device using semiconductor element","assignee":null,"inventors":[],"filing_date":"2022-08-01T00:00:00.000Z","publication_date":"2024-05-07T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":4,"abstract":"An n+ layer 3a connected to a source line SL at both ends, an n+ layer 3b connected to a bit line BL, a first gate insulating layer 4a formed on a semiconductor substrate 1 existing on an insulating film 2, a gate conductor layer 16a connected to a plate line PL, a gate insulating layer 4b formed on the semiconductor substrate, and a second gate conductor layer 5b connected to a word line WL and having a work function different from a work function of the gate conductor layer 16a are disposed on the semiconductor substrate, and data hold operation of holding, near a gate insulating film, holes generated by an impact ionization phenomenon or gate-induced drain leakage current inside a channel region 12 of the semiconductor substrate 1 and data erase operation of removing the holes from inside the substrate 1 and the channel region 12 are performed by controlling voltage applied to the source line SL, the plate line PL, the word line WL, and the bit line BL."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory device using semiconductor element","description":"An n+ layer 3a connected to a source line SL at both ends, an n+ layer 3b connected to a bit line BL, a first gate insulating layer 4a formed on a semiconductor substrate 1 existing on an insulating f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11980022","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11980022","citation_suggestion":"Patentable. \"Memory device using semiconductor element\" (US-11980022). https://patentable.app/patents/US-11980022","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11980022","json":"https://patentable.app/api/llm-context/US-11980022","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:50:57.250Z"}