{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11983410","patent":{"patent_number":"US-11983410","title":"Method optimizing DQ calibration pattern for memory device and computing system performing same","assignee":null,"inventors":[],"filing_date":"2021-11-18T00:00:00.000Z","publication_date":"2024-05-14T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06N","G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"A method optimizing DQ calibration patterns for a memory device including data input/output (I/O) pins. The method includes; communicating a training command to the memory device, performing a training operation on each of the data I/O pins using a first training pattern having a first condition and a second training pattern having a second condition to generate a training operation result, wherein the first condition is characterized by adjacent data I/O pins among the data I/O pins providing data signals with different phases, and the second condition is characterized by adjacent data I/O pins providing data signals having a same phase, and aligning a data strobe signal with data signals provided from the data I/O pins in response the training operation result."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method optimizing DQ calibration pattern for memory device and computing system performing same","description":"A method optimizing DQ calibration patterns for a memory device including data input/output (I/O) pins. The method includes; communicating a training command to the memory device, performing a trainin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11983410","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11983410","citation_suggestion":"Patentable. \"Method optimizing DQ calibration pattern for memory device and computing system performing same\" (US-11983410). https://patentable.app/patents/US-11983410","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11983410","json":"https://patentable.app/api/llm-context/US-11983410","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:03:49.012Z"}