{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11983566","patent":{"patent_number":"US-11983566","title":"Hardware circuit for deep learning task scheduling","assignee":null,"inventors":[],"filing_date":"2021-07-13T00:00:00.000Z","publication_date":"2024-05-14T00:00:00.000Z","cpc_codes":["G06F","G06F","G06N","G06N"],"num_claims":23,"abstract":"Apparatuses, systems, and techniques for scheduling deep learning tasks in hardware are described. One accelerator circuit includes multiple fixed-function circuits that each processes a different layer type of a neural network. A scheduler circuit receives state information associated with a respective layer being processed by a respective fixed-function circuit and dependency information that indicates a layer dependency condition for the respective layer. The scheduler circuit determines that the layer dependency condition is satisfied using the state information and the dependency information and enables the fixed-function circuit to process the current layer at the respective fixed-function circuit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Hardware circuit for deep learning task scheduling","description":"Apparatuses, systems, and techniques for scheduling deep learning tasks in hardware are described. One accelerator circuit includes multiple fixed-function circuits that each processes a different lay","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11983566","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11983566","citation_suggestion":"Patentable. \"Hardware circuit for deep learning task scheduling\" (US-11983566). https://patentable.app/patents/US-11983566","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11983566","json":"https://patentable.app/api/llm-context/US-11983566","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:23:20.672Z"}