{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11984159","patent":{"patent_number":"US-11984159","title":"Nonvolatile memory apparatus for mitigating read disturbance and system using the same","assignee":null,"inventors":[],"filing_date":"2021-09-10T00:00:00.000Z","publication_date":"2024-05-14T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":17,"abstract":"A nonvolatile memory apparatus may include a memory cell, a bit line control circuit, and a word line control circuit. The memory cell may be coupled between a global bit line and a global word line. During a read operation, the bit line control circuit may provide a first high voltage to the global bit line and provide a second high voltage to the global bit line when snapback of the memory cell occurs. During the read operation, the word line control circuit may provide a second read supply voltage to the global word line and provide an anneal supply voltage to the global word line when snapback of the memory cell occurs."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Nonvolatile memory apparatus for mitigating read disturbance and system using the same","description":"A nonvolatile memory apparatus may include a memory cell, a bit line control circuit, and a word line control circuit. The memory cell may be coupled between a global bit line and a global word line. ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11984159","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11984159","citation_suggestion":"Patentable. \"Nonvolatile memory apparatus for mitigating read disturbance and system using the same\" (US-11984159). https://patentable.app/patents/US-11984159","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11984159","json":"https://patentable.app/api/llm-context/US-11984159","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T20:29:54.793Z"}