{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11984502","patent":{"patent_number":"US-11984502","title":"Semiconductor device with suppression of decrease of withstand voltage, and method for manufacturing the semiconductor device","assignee":null,"inventors":[],"filing_date":"2021-03-03T00:00:00.000Z","publication_date":"2024-05-14T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":13,"abstract":"A semiconductor device 1 includes a base body 3 that includes a p type substrate 4 and an n type semiconductor layer 5 formed on the p type substrate 4 and includes an element region 2 having a transistor 40 with the n type semiconductor layer as a drain, a p type element isolation region 7 that is formed in a surface layer portion of the base body such as to demarcate the element region, and a conductive wiring 25 that is disposed on a peripheral edge portion of the element region and is electrically connected to the n type semiconductor layer. The transistor includes an n+ type drain contact region 14 that is formed in a surface layer portion of the n type semiconductor layer in the peripheral edge portion of the element region. The conductive wiring is disposed such as to cover at least a portion of an element termination region 30 between the n+ type drain contact region and the p type element isolation region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device with suppression of decrease of withstand voltage, and method for manufacturing the semiconductor device","description":"A semiconductor device 1 includes a base body 3 that includes a p type substrate 4 and an n type semiconductor layer 5 formed on the p type substrate 4 and includes an element region 2 having a transi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11984502","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11984502","citation_suggestion":"Patentable. \"Semiconductor device with suppression of decrease of withstand voltage, and method for manufacturing the semiconductor device\" (US-11984502). https://patentable.app/patents/US-11984502","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11984502","json":"https://patentable.app/api/llm-context/US-11984502","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T15:09:04.999Z"}