{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11990430","patent":{"patent_number":"US-11990430","title":"Bonding structures of integrated circuit devices and method forming the same","assignee":null,"inventors":[],"filing_date":"2021-02-26T00:00:00.000Z","publication_date":"2024-05-21T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bonding structures of integrated circuit devices and method forming the same","description":"A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etchin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11990430","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11990430","citation_suggestion":"Patentable. \"Bonding structures of integrated circuit devices and method forming the same\" (US-11990430). https://patentable.app/patents/US-11990430","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11990430","json":"https://patentable.app/api/llm-context/US-11990430","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T10:39:46.904Z"}