{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11994991","patent":{"patent_number":"US-11994991","title":"Cache memory device and method for implementing cache scheduling using same","assignee":null,"inventors":[],"filing_date":"2023-11-14T00:00:00.000Z","publication_date":"2024-05-28T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":7,"abstract":"It is one object of the present disclosure to provide measures for securing scalability of the queue depth of cache schedulers by utilizing a plurality of cache schedulers. To this end, a cache memory device in accordance with one embodiment of the present disclosure comprises: a request reception unit configured to receive input transactions; a traffic monitoring module configured to monitor traffic of the input transactions; N cache schedulers, wherein N is an integer greater than or equal to 2; a region setting module configured to set N input transaction regions corresponding to each of the N cache schedulers based on the traffic of the input transactions monitored, wherein input transactions are transferred via an input transaction region set in each cache scheduler; and an access execution unit configured to perform cache memory accesses to input transactions scheduled by the N cache schedulers."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cache memory device and method for implementing cache scheduling using same","description":"It is one object of the present disclosure to provide measures for securing scalability of the queue depth of cache schedulers by utilizing a plurality of cache schedulers. To this end, a cache memory","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11994991","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11994991","citation_suggestion":"Patentable. \"Cache memory device and method for implementing cache scheduling using same\" (US-11994991). https://patentable.app/patents/US-11994991","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11994991","json":"https://patentable.app/api/llm-context/US-11994991","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:00:46.577Z"}