{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11995008","patent":{"patent_number":"US-11995008","title":"Memory controller with hybrid DRAM/persistent memory channel arbitration","assignee":null,"inventors":[],"filing_date":"2021-06-22T00:00:00.000Z","publication_date":"2024-05-28T00:00:00.000Z","cpc_codes":["G06F","G11C"],"num_claims":20,"abstract":"A memory controller includes a command queue having an input for receiving memory access commands for a memory channel, and a number of entries for holding a predetermined number of memory access commands, and an arbiter that selects memory commands from the command queue for dispatch to one of a persistent memory and a DRAM memory coupled to the memory channel. The arbiter includes a first-tier sub-arbiter circuit coupled to the command queue for selecting candidate commands from among DRAM commands and persistent memory commands, and a second-tier sub-arbiter circuit coupled to the first-tier sub-arbiter circuit for receiving the candidate commands and selecting at least one command from among the candidate commands."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller with hybrid DRAM/persistent memory channel arbitration","description":"A memory controller includes a command queue having an input for receiving memory access commands for a memory channel, and a number of entries for holding a predetermined number of memory access comm","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11995008","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11995008","citation_suggestion":"Patentable. \"Memory controller with hybrid DRAM/persistent memory channel arbitration\" (US-11995008). https://patentable.app/patents/US-11995008","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11995008","json":"https://patentable.app/api/llm-context/US-11995008","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T13:15:15.028Z"}