{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11996362","patent":{"patent_number":"US-11996362","title":"Integrated circuit device with crenellated metal trace layout","assignee":null,"inventors":[],"filing_date":"2021-10-04T00:00:00.000Z","publication_date":"2024-05-28T00:00:00.000Z","cpc_codes":["H01L","G06F","G06F","H01L","H01L","H01L","H01L","H01L"],"num_claims":18,"abstract":"Integrated circuit (IC) cell architectures including a crenellated interconnect trace layout. A crenellated trace layout may be employed where an IC cell includes transistor having a source/drain terminal interconnected through a back-side (3D) routing scheme that reduces front-side routing density for a given transistor footprint. In the crenellated layout, adjacent interconnect traces or tracks may have their ends staggered according to a crenellation phase for the cell. Crenellated tracks may intersect one cell boundary with adjacent tracks intersecting an opposite cell boundary. Track ends may be offset by at least the width of an underlying orthogonal interconnect trace. Crenellated track ends may be offset by the width of an underlying orthogonal interconnect trace and half a spacing between adjacent orthogonal interconnect traces."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuit device with crenellated metal trace layout","description":"Integrated circuit (IC) cell architectures including a crenellated interconnect trace layout. A crenellated trace layout may be employed where an IC cell includes transistor having a source/drain term","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11996362","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11996362","citation_suggestion":"Patentable. \"Integrated circuit device with crenellated metal trace layout\" (US-11996362). https://patentable.app/patents/US-11996362","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11996362","json":"https://patentable.app/api/llm-context/US-11996362","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:18:59.054Z"}