{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12001344","patent":{"patent_number":"US-12001344","title":"Memory access compression using clear code for tile pixels","assignee":null,"inventors":[],"filing_date":"2023-04-10T00:00:00.000Z","publication_date":"2024-06-04T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06T","G06T","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"One embodiment provides an apparatus comprising a memory device configured to store a page table that includes a set of page table entries and a graphics processing cluster array including a plurality of graphics multiprocessors, the plurality of graphics multiprocessors coupled via a data interconnect. The graphics multiprocessor of the plurality of graphics multiprocessors includes a translation lookaside buffer (TLB) coupled with the memory device, the TLB to cache a first page table entry of the set of page table entries, the first page table entry to indicate that a first virtual page is a valid page that is cleared to a clear color and circuitry to bypass an access to the memory device for the first virtual page and determine a color associated with the first virtual page based on the indication that the first virtual page is a valid page that is cleared to the clear color."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory access compression using clear code for tile pixels","description":"One embodiment provides an apparatus comprising a memory device configured to store a page table that includes a set of page table entries and a graphics processing cluster array including a plurality","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12001344","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12001344","citation_suggestion":"Patentable. \"Memory access compression using clear code for tile pixels\" (US-12001344). https://patentable.app/patents/US-12001344","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12001344","json":"https://patentable.app/api/llm-context/US-12001344","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:19:50.405Z"}