{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12002503","patent":{"patent_number":"US-12002503","title":"Memory circuit and memory","assignee":null,"inventors":[],"filing_date":"2022-07-21T00:00:00.000Z","publication_date":"2024-06-04T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":15,"abstract":"The present disclosure provides a memory circuit and a memory. The memory circuit at least includes a plurality of memory blocks. Each of the memory blocks includes a first memory sub-block, a second memory sub-block, and a third memory sub-block arranged in sequence; the second memory sub-block includes a first memory unit and a second memory unit; the first memory sub-block and the first memory unit are configured to store high-order bytes; the second memory unit and the third memory sub-block are configured to store low-order bytes; and in an arrangement direction of memory sub-blocks, different memory units that are arranged side by side have different block selection addresses."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory circuit and memory","description":"The present disclosure provides a memory circuit and a memory. The memory circuit at least includes a plurality of memory blocks. Each of the memory blocks includes a first memory sub-block, a second ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12002503","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12002503","citation_suggestion":"Patentable. \"Memory circuit and memory\" (US-12002503). https://patentable.app/patents/US-12002503","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12002503","json":"https://patentable.app/api/llm-context/US-12002503","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T14:08:51.118Z"}