{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12007875","patent":{"patent_number":"US-12007875","title":"Chip having debug memory interface and debug method thereof","assignee":null,"inventors":[],"filing_date":"2020-09-22T00:00:00.000Z","publication_date":"2024-06-11T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":9,"abstract":"A chip having a debug memory interface includes a processing unit, an internal storage unit, a debug memory interface, and a detection unit. The internal storage unit is used to record status data during operation of the processing unit. The detection unit is used to detect whether the debug memory interface is electrically connected to an external memory device. When the debug memory interface is judged to be electrically connected to the external memory device, a control signal is transmitted to the processing unit in order to trigger the processing unit to read a debug program from the external memory device and execute the debug program to run a debug mode based on the status data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Chip having debug memory interface and debug method thereof","description":"A chip having a debug memory interface includes a processing unit, an internal storage unit, a debug memory interface, and a detection unit. The internal storage unit is used to record status data dur","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12007875","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12007875","citation_suggestion":"Patentable. \"Chip having debug memory interface and debug method thereof\" (US-12007875). https://patentable.app/patents/US-12007875","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12007875","json":"https://patentable.app/api/llm-context/US-12007875","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:47:38.618Z"}