{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12009036","patent":{"patent_number":"US-12009036","title":"NAND flash memory device and method of reducing program disturb thereof","assignee":null,"inventors":[],"filing_date":"2021-11-18T00:00:00.000Z","publication_date":"2024-06-11T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":16,"abstract":"In certain aspects, a memory device includes memory strings each including a drain select gate (DSG) transistor and memory cells, and a peripheral circuit coupled to the memory strings. The peripheral circuit is configured to, in a program/verify cycle, program a target memory cell of the memory cells in a select memory string of the memory strings, and after programming the target memory cell, verify the target memory cell using one or more verify voltages including an initial verify voltage. The peripheral circuit is also configured to compare the initial verify voltage with a threshold verify voltage so as to obtain a comparing result, and control, at least based on the comparing result, the DSG transistor in an unselect memory string of the memory strings between programming and verifying the targe memory cell."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"NAND flash memory device and method of reducing program disturb thereof","description":"In certain aspects, a memory device includes memory strings each including a drain select gate (DSG) transistor and memory cells, and a peripheral circuit coupled to the memory strings. The peripheral","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12009036","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12009036","citation_suggestion":"Patentable. \"NAND flash memory device and method of reducing program disturb thereof\" (US-12009036). https://patentable.app/patents/US-12009036","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12009036","json":"https://patentable.app/api/llm-context/US-12009036","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:47:34.789Z"}