{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12009055","patent":{"patent_number":"US-12009055","title":"Far end driver for memory clock","assignee":null,"inventors":[],"filing_date":"2022-01-10T00:00:00.000Z","publication_date":"2024-06-11T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Memory clock drivers, memories, and methods of operating memory clock drivers are provided. A memory device contains two memory clock drivers disposed opposite each other across an array of rows of memory cells. The memory clock drivers contain decoders, which decode an address corresponding to one or more rows of memory cells. The decoders are configured to decode the address to provide a plurality of word line signals to the corresponding rows of memory cells. The memory device also includes a row select circuit, which receives a row select address and activates a corresponding row of memory cells. The memory device includes control circuitry to control the arrays of memory cells at a local and a global level, as well as I/O modules to send signals to different parts of the memory device and integrate the memory device into external devices."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Far end driver for memory clock","description":"Memory clock drivers, memories, and methods of operating memory clock drivers are provided. A memory device contains two memory clock drivers disposed opposite each other across an array of rows of me","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12009055","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12009055","citation_suggestion":"Patentable. \"Far end driver for memory clock\" (US-12009055). https://patentable.app/patents/US-12009055","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12009055","json":"https://patentable.app/api/llm-context/US-12009055","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T02:40:56.115Z"}