{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12009423","patent":{"patent_number":"US-12009423","title":"Two-rotation gate-edge diode leakage reduction for MOS transistors","assignee":null,"inventors":[],"filing_date":"2020-12-28T00:00:00.000Z","publication_date":"2024-06-11T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":17,"abstract":"An integrated circuit is fabricated by forming transistors having gates of orthogonal orientations and implanting, at two first rotations, a first pocket implant using a first dopant type with a masking pattern on a substrate surface layer, the two first rotations respectively forming two first pocket implantation angles and two first pocket implantation beam orientations, and implanting, at two second rotations, a retrograde gate-edge diode leakage (GDL) reduction pocket implant using a second dopant type with the masking pattern on the substrate surface layer, the two second rotations respectively forming two GDL-reduction implantation angles and two GDL-reduction implantation beam orientations. Owing to the different symmetries in implantation angles seen by the two orientations of transistors, leakage is reduced for transistors of both orientations and mismatch is maintained for transistors of one of the orientations, making these transistors suitable for use in analog circuits requiring matched pairs of transistors."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Two-rotation gate-edge diode leakage reduction for MOS transistors","description":"An integrated circuit is fabricated by forming transistors having gates of orthogonal orientations and implanting, at two first rotations, a first pocket implant using a first dopant type with a maski","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12009423","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12009423","citation_suggestion":"Patentable. \"Two-rotation gate-edge diode leakage reduction for MOS transistors\" (US-12009423). https://patentable.app/patents/US-12009423","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12009423","json":"https://patentable.app/api/llm-context/US-12009423","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:58:54.937Z"}