{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-12009813","patent":{"patent_number":"US-12009813","title":"Technologies for reduction of memory effects in a capacitor for qubit gate control","assignee":null,"inventors":[],"filing_date":"2022-05-27T00:00:00.000Z","publication_date":"2024-06-11T00:00:00.000Z","cpc_codes":["G06N","G06N"],"num_claims":25,"abstract":"Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes an array of capacitors that can be charged to a voltage based on a voltage to be applied to a gate of the quantum processor. The capacitors in the array of capacitors are connected to the gate one at a time, charging up a parasitic capacitance. As more capacitors are switched, the voltage on the gate approaches a target voltage with an exponentially-decreasing voltage error."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Technologies for reduction of memory effects in a capacitor for qubit gate control","description":"Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltage","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-12009813","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-12009813","citation_suggestion":"Patentable. \"Technologies for reduction of memory effects in a capacitor for qubit gate control\" (US-12009813). https://patentable.app/patents/US-12009813","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-12009813","json":"https://patentable.app/api/llm-context/US-12009813","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T02:42:06.387Z"}