{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8460960","patent":{"patent_number":"US-8460960","title":"Method for fabricating integrated circuit","assignee":null,"inventors":[],"filing_date":"2011-07-20T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":15,"abstract":"A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for fabricating integrated circuit","description":"A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked the","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8460960","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8460960","citation_suggestion":"Patentable. \"Method for fabricating integrated circuit\" (US-8460960). https://patentable.app/patents/US-8460960","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8460960","json":"https://patentable.app/api/llm-context/US-8460960","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:03:56.025Z"}