{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8462536","patent":{"patent_number":"US-8462536","title":"Method and apparatus for addressing memory arrays","assignee":null,"inventors":[],"filing_date":"2011-03-11T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C"],"num_claims":7,"abstract":"The present description relates to non-volatile memory arrays and the operation thereof In at least one embodiment, the non-volatile memory array may include a plurality of memory modules coupled in a daisy chain with enable in/out signals, and a single chip enable signal coupled in parallel to each memory module. With such a configuration, all memory units within each of the memory modules of each memory array may be addressed with the single chip enable signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and apparatus for addressing memory arrays","description":"The present description relates to non-volatile memory arrays and the operation thereof In at least one embodiment, the non-volatile memory array may include a plurality of memory modules coupled in a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8462536","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8462536","citation_suggestion":"Patentable. \"Method and apparatus for addressing memory arrays\" (US-8462536). https://patentable.app/patents/US-8462536","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8462536","json":"https://patentable.app/api/llm-context/US-8462536","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:37:49.956Z"}