{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8462542","patent":{"patent_number":"US-8462542","title":"Bit-by-bit write assist for solid-state memory","assignee":null,"inventors":[],"filing_date":"2010-06-24T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G11C"],"num_claims":27,"abstract":"A solid-state memory in which write assist circuitry is implemented within each memory cell. Each memory cell includes a storage element, such as a pair of cross-coupled inverters, that is connected in series with a pair of power switch transistors between a power supply node and ground. One of the power switch transistors is gated by a word line indicating selection of the row containing the cell, and the other is gated by a column select signal indicating selection of the column containing the cell in a write cycle. Upon a write to the cell, both power switch transistors are turned off, removing bias from the inverter that assists its change of state in a write operation. In other embodiments, a single power switch transistor gated by either a word line or a column select signal may be used."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bit-by-bit write assist for solid-state memory","description":"A solid-state memory in which write assist circuitry is implemented within each memory cell. Each memory cell includes a storage element, such as a pair of cross-coupled inverters, that is connected i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8462542","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8462542","citation_suggestion":"Patentable. \"Bit-by-bit write assist for solid-state memory\" (US-8462542). https://patentable.app/patents/US-8462542","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8462542","json":"https://patentable.app/api/llm-context/US-8462542","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T22:31:28.204Z"}