{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8462553","patent":{"patent_number":"US-8462553","title":"Cell array for highly-scalable, byte-alterable, two-transistor FLOTOX EEPROM non-volatile memory","assignee":null,"inventors":[],"filing_date":"2010-12-23T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":58,"abstract":"Two-transistor FLOTOX EEPROM cells are collected to form an alterable unit such as a byte. Each of the two-transistor FLOTOX EEPROM cells has a bit line connected to a drain of a select transistor of each of the two-transistor FLOTOX EEPROM cells and a source line placed in parallel with the bit line and connected to a source of a floating gate transistor of each of the two-transistor FLOTOX EEPROM cells. In a program operation, the bit lines are connected to a very large programming voltage level and the source lines are connected to a punch through inhibit voltage level. The punch through inhibit voltage level is approximately one half the very large programming voltage level. The lower drain-to-source voltage level permits the select transistor and the floating gate transistor to have smaller channel lengths and therefore a lower drain-to-source breakdown voltage."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cell array for highly-scalable, byte-alterable, two-transistor FLOTOX EEPROM non-volatile memory","description":"Two-transistor FLOTOX EEPROM cells are collected to form an alterable unit such as a byte. Each of the two-transistor FLOTOX EEPROM cells has a bit line connected to a drain of a select transistor of ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8462553","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8462553","citation_suggestion":"Patentable. \"Cell array for highly-scalable, byte-alterable, two-transistor FLOTOX EEPROM non-volatile memory\" (US-8462553). https://patentable.app/patents/US-8462553","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8462553","json":"https://patentable.app/api/llm-context/US-8462553","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T12:44:44.060Z"}