{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8462566","patent":{"patent_number":"US-8462566","title":"Memory module with termination component","assignee":null,"inventors":[],"filing_date":"2008-04-29T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G06F","G11C","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":34,"abstract":"A memory component having a first and second interface. The first interface is provided to sample address information in response to a first clock signal. The first interface includes inputs to sample at least two bits of the address information in succession during a clock cycle of the first clock signal. The second interface is provided to sample data in response to a second clock signal, having a frequency that is at least twice the frequency of the first clock signal. The second interface includes inputs to sample at least two bits of data in succession during a clock cycle of the second clock signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory module with termination component","description":"A memory component having a first and second interface. The first interface is provided to sample address information in response to a first clock signal. The first interface includes inputs to sample","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8462566","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8462566","citation_suggestion":"Patentable. \"Memory module with termination component\" (US-8462566). https://patentable.app/patents/US-8462566","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8462566","json":"https://patentable.app/api/llm-context/US-8462566","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:24:12.267Z"}