{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8463820","patent":{"patent_number":"US-8463820","title":"System and method for memory bandwidth friendly sorting on multi-core architectures","assignee":null,"inventors":[],"filing_date":"2009-05-26T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":28,"abstract":"In some embodiments, the invention involves utilizing a tree merge sort in a platform to minimize cache reads/writes when sorting large amounts of data. An embodiment uses blocks of pre-sorted data residing in “leaf nodes” residing in memory storage. A pre-sorted block of data from each leaf node is read from memory and stored in faster cache memory. A tree merge sort is performed on the nodes that are cache resident until a block of data migrates to a root node. Sorted blocks reaching the root node are written to memory storage in an output list until all pre-sorted data blocks have been moved to cache and merged upward to the root. The completed output list in memory storage is a list of the fully sorted data. Other embodiments are described and claimed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and method for memory bandwidth friendly sorting on multi-core architectures","description":"In some embodiments, the invention involves utilizing a tree merge sort in a platform to minimize cache reads/writes when sorting large amounts of data. An embodiment uses blocks of pre-sorted data re","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8463820","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8463820","citation_suggestion":"Patentable. \"System and method for memory bandwidth friendly sorting on multi-core architectures\" (US-8463820). https://patentable.app/patents/US-8463820","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8463820","json":"https://patentable.app/api/llm-context/US-8463820","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:24:34.014Z"}