{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8464032","patent":{"patent_number":"US-8464032","title":"Microprocessor integrated circuit with first processor that outputs debug information in response to reset by second processor of the integrated circuit","assignee":null,"inventors":[],"filing_date":"2010-03-29T00:00:00.000Z","publication_date":"2013-06-11T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":26,"abstract":"A microprocessor integrated circuit includes first and second processors. The first processor is configured to detect that the second processor has not retired an instruction for a predetermined amount of clock cycles and to responsively reset the second processor. The microprocessor integrated circuit also includes microcode. The second processor is configured to execute the microcode in response to a reset of the second processor. The microcode is configured to read debug information within the microprocessor integrated circuit and to output the debug information external to the microprocessor integrated circuit in response to determining that the reset was performed by the first processor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Microprocessor integrated circuit with first processor that outputs debug information in response to reset by second processor of the integrated circuit","description":"A microprocessor integrated circuit includes first and second processors. The first processor is configured to detect that the second processor has not retired an instruction for a predetermined amoun","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8464032","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8464032","citation_suggestion":"Patentable. \"Microprocessor integrated circuit with first processor that outputs debug information in response to reset by second processor of the integrated circuit\" (US-8464032). https://patentable.app/patents/US-8464032","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8464032","json":"https://patentable.app/api/llm-context/US-8464032","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:50:46.635Z"}