{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8467254","patent":{"patent_number":"US-8467254","title":"Memory apparatus","assignee":null,"inventors":[],"filing_date":"2011-09-25T00:00:00.000Z","publication_date":"2013-06-18T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":12,"abstract":"A memory apparatus includes a mimic redundant device comparator, a reference delay signal generator, and a signal comparison controller. The mimic redundant device comparator is configured to receive an input signal and to delay the input signal according to a mimic delay, so as to generate a comparison signal. The reference delay signal generator is configured to receive the input signal and to delay the input signal according to a plurality of reference delays, so as to generate a plurality of reference delay signals. The signal comparison controller is configured to receive the reference delay signals and the comparison signal. According to a time difference between the comparison signal and the reference delay signals, the signal comparison controller is configured to generate a selected signal and to generate a delay control signal according to the selected signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory apparatus","description":"A memory apparatus includes a mimic redundant device comparator, a reference delay signal generator, and a signal comparison controller. The mimic redundant device comparator is configured to receive ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8467254","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8467254","citation_suggestion":"Patentable. \"Memory apparatus\" (US-8467254). https://patentable.app/patents/US-8467254","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8467254","json":"https://patentable.app/api/llm-context/US-8467254","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:44:38.572Z"}