{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8468401","patent":{"patent_number":"US-8468401","title":"Apparatus and method for manufacturing a multiple-chip memory device with multi-stage testing","assignee":null,"inventors":[],"filing_date":"2010-08-13T00:00:00.000Z","publication_date":"2013-06-18T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":7,"abstract":"A method for manufacturing a multiple-chip memory device includes making a volatile memory element on a semiconductor substrate, examining the volatile memory element for one or more initial errors, correcting the one or more initial errors on the semiconductor substrate, incorporating the volatile memory element into the multiple-chip memory device, and incorporating a non-volatile memory element into the multiple-chip memory device. The volatile memory element is examined for one or more secondary errors, after incorporating the volatile memory element and the non-volatile memory element into the multiple-chip memory device. Repair information is stored in a non-volatile memory element, the repair information identifying the one or more secondary errors."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Apparatus and method for manufacturing a multiple-chip memory device with multi-stage testing","description":"A method for manufacturing a multiple-chip memory device includes making a volatile memory element on a semiconductor substrate, examining the volatile memory element for one or more initial errors, c","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8468401","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8468401","citation_suggestion":"Patentable. \"Apparatus and method for manufacturing a multiple-chip memory device with multi-stage testing\" (US-8468401). https://patentable.app/patents/US-8468401","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8468401","json":"https://patentable.app/api/llm-context/US-8468401","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:18:06.255Z"}