{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8470669","patent":{"patent_number":"US-8470669","title":"System and method for EEPROM architecture","assignee":null,"inventors":[],"filing_date":"2010-12-02T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":12,"abstract":"A method for manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) device includes providing a substrate and forming a gate oxide over the substrate. Also, the method includes providing a mask overlying the gate oxide layer, the mask defining a tunnel opening. The method additionally includes performing selective etching over the mask to form a tunnel oxide layer. The method includes forming a floating gate over the tunnel oxide layer and a selective gate over the gate oxide layer. The method includes angle doping a region of the substrate using the floating gate as a mask to obtain a first doped region. The method further includes forming a dielectric layer over the floating gate and a control gate over the dielectric layer. The method additionally includes angle doping a second region of the substrate using the selective gate as a mask to obtain a second doped region, wherein the first and second doped regions partially overlap."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and method for EEPROM architecture","description":"A method for manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) device includes providing a substrate and forming a gate oxide over the substrate. Also, the method includes ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8470669","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8470669","citation_suggestion":"Patentable. \"System and method for EEPROM architecture\" (US-8470669). https://patentable.app/patents/US-8470669","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8470669","json":"https://patentable.app/api/llm-context/US-8470669","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:19:17.358Z"}