{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8470674","patent":{"patent_number":"US-8470674","title":"Structure, method and system for complementary strain fill for integrated circuit chips","assignee":null,"inventors":[],"filing_date":"2011-01-03T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":24,"abstract":"A structure, method and system for complementary strain fill for integrated circuit chips. The structure includes a first region of an integrated circuit having multiplicity of n-channel and p-channel field effect transistors (FETs); a first stressed layer over n-channel field effect transistors (NFETs) of the first region, the first stressed layer of a first stress type; a second stressed layer over p-channel field effect transistors (PFETs) of the first region, the second stressed layer of a second stress type, the second stress type opposite from the first stress type; and a second region of the integrated circuit, the second region not containing FETs, the second region containing first sub-regions of the first stressed layer and second sub-regions of the second stressed layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Structure, method and system for complementary strain fill for integrated circuit chips","description":"A structure, method and system for complementary strain fill for integrated circuit chips. The structure includes a first region of an integrated circuit having multiplicity of n-channel and p-channel","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8470674","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8470674","citation_suggestion":"Patentable. \"Structure, method and system for complementary strain fill for integrated circuit chips\" (US-8470674). https://patentable.app/patents/US-8470674","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8470674","json":"https://patentable.app/api/llm-context/US-8470674","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:55:12.923Z"}