{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8471529","patent":{"patent_number":"US-8471529","title":"Battery fault tolerant architecture for cell failure modes parallel bypass circuit","assignee":null,"inventors":[],"filing_date":"2010-10-14T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["H02J","H02J"],"num_claims":16,"abstract":"A by-pass circuit for a battery system that disconnects parallel connected cells or modules from a battery circuit or controls the current through the parallel connected cells or modules. If a cell has failed or is potentially failing in the system, then the by-pass circuit can disconnect the cell or module from other cells or modules electrically coupled in parallel. If a cell or module has a lower capability than another cell or module, then the by-pass circuit can control the current to the cell or module to maximize the performance of the system and prevent the system from creating a walk-home condition."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Battery fault tolerant architecture for cell failure modes parallel bypass circuit","description":"A by-pass circuit for a battery system that disconnects parallel connected cells or modules from a battery circuit or controls the current through the parallel connected cells or modules. If a cell ha","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8471529","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8471529","citation_suggestion":"Patentable. \"Battery fault tolerant architecture for cell failure modes parallel bypass circuit\" (US-8471529). https://patentable.app/patents/US-8471529","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8471529","json":"https://patentable.app/api/llm-context/US-8471529","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:46:40.965Z"}