{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8472236","patent":{"patent_number":"US-8472236","title":"Differential plate line screen test for ferroelectric latch circuits","assignee":null,"inventors":[],"filing_date":"2012-09-25T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":10,"abstract":"Non-volatile latch circuits, such as in memory cells and flip-flops, that are constructed for reliability screening. The non-volatile latch circuits each include ferroelectric capacitors coupled to storage nodes, for example at the outputs of cross-coupled inverters. Separate plate lines are connected to the ferroelectric capacitors of the complementary storage nodes. A time-zero test of the latch stability margin is performed by setting a logic state at the storage nodes, then programming the state into the ferroelectric capacitors by polarization. After power-down, the plate lines are biased with a differential voltage relative to one another, and the latch is then powered up to attempt recall of the programmed state. The differential voltage disturbs the recall, and provides a measure of the cell margin and its later-life reliability."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Differential plate line screen test for ferroelectric latch circuits","description":"Non-volatile latch circuits, such as in memory cells and flip-flops, that are constructed for reliability screening. The non-volatile latch circuits each include ferroelectric capacitors coupled to st","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8472236","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8472236","citation_suggestion":"Patentable. \"Differential plate line screen test for ferroelectric latch circuits\" (US-8472236). https://patentable.app/patents/US-8472236","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8472236","json":"https://patentable.app/api/llm-context/US-8472236","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T21:44:39.108Z"}