{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8472251","patent":{"patent_number":"US-8472251","title":"Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device","assignee":null,"inventors":[],"filing_date":"2009-02-10T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":65,"abstract":"A single polycrystalline silicon floating gate nonvolatile memory cell has a MOS capacitor and a storage MOS transistor fabricated with dimensions that allow fabrication using current low voltage logic integrated circuit process. The MOS capacitor has a first plate connected to a gate of the storage MOS transistor to form a floating gate node. The physical size of the MOS capacitor is relatively large (approximately 10 time greater) when compared to a physical size of the storage MOS transistor to establish a large coupling ratio (greater than 80%) between the second plate of the MOS capacitor and the floating gate node. When a voltage is applied to the second plate of the MOS capacitor and a voltage applied to the source region or drain region of the MOS transistor establishes a voltage field within the gate oxide of the MOS transistor such that Fowler-Nordheim edge tunnel is initiated."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device","description":"A single polycrystalline silicon floating gate nonvolatile memory cell has a MOS capacitor and a storage MOS transistor fabricated with dimensions that allow fabrication using current low voltage logi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8472251","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8472251","citation_suggestion":"Patentable. \"Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device\" (US-8472251). https://patentable.app/patents/US-8472251","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8472251","json":"https://patentable.app/api/llm-context/US-8472251","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:51:32.866Z"}