{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8472255","patent":{"patent_number":"US-8472255","title":"Compensation of non-volatile memory chip non-idealities by program pulse adjustment","assignee":null,"inventors":[],"filing_date":"2012-09-06T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Compensation of non-volatile memory chip non-idealities by program pulse adjustment","description":"To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have p","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8472255","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8472255","citation_suggestion":"Patentable. \"Compensation of non-volatile memory chip non-idealities by program pulse adjustment\" (US-8472255). https://patentable.app/patents/US-8472255","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8472255","json":"https://patentable.app/api/llm-context/US-8472255","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:24:22.707Z"}