{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8472269","patent":{"patent_number":"US-8472269","title":"Redundancy control circuit and memory device including the same","assignee":null,"inventors":[],"filing_date":"2011-08-31T00:00:00.000Z","publication_date":"2013-06-25T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","H01L"],"num_claims":20,"abstract":"A redundancy control circuit includes an address fuse circuit and a first circuit. The address fuse circuit includes a plurality of first fuses. Each of the first fuses is configured to be cut based on a result of comparing a number of bits of a defective input address having a first logic level with a number of bits of the defective input address having a second logic level. The address fuse circuit is configured to generate a first address using the first fuses based on a cutting operation that depends on the result of comparing. The first circuit is configured to output either the first address or a second address that is an inverted address of the first address as a repair address, wherein a logic level of each of bits of the repair address is the same as that of the defective input address."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Redundancy control circuit and memory device including the same","description":"A redundancy control circuit includes an address fuse circuit and a first circuit. The address fuse circuit includes a plurality of first fuses. Each of the first fuses is configured to be cut based o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8472269","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8472269","citation_suggestion":"Patentable. \"Redundancy control circuit and memory device including the same\" (US-8472269). https://patentable.app/patents/US-8472269","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8472269","json":"https://patentable.app/api/llm-context/US-8472269","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:57:31.938Z"}