{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8476718","patent":{"patent_number":"US-8476718","title":"Semiconductor device including a gate insulating film having a metal oxide layer having trap levels","assignee":null,"inventors":[],"filing_date":"2010-02-23T00:00:00.000Z","publication_date":"2013-07-02T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":8,"abstract":"A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from Hf and Zr, the metal oxide layer further including at least one element selected from the group consisting of Ru, Cr, Os, V, Tc, and Nb, the metal oxide layer having sites that capture or release charges formed by inclusion of the element, density of the element in the metal oxide layer being in the range of 1×1015 cm−3 to 2.96×1020 cm−3, the sites being distributed to have a peak closer to the semiconductor region than to a center of the metal oxide layer; and a gate electrode formed on the gate insulating film."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device including a gate insulating film having a metal oxide layer having trap levels","description":"A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8476718","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8476718","citation_suggestion":"Patentable. \"Semiconductor device including a gate insulating film having a metal oxide layer having trap levels\" (US-8476718). https://patentable.app/patents/US-8476718","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8476718","json":"https://patentable.app/api/llm-context/US-8476718","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:50:50.474Z"}