{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8477556","patent":{"patent_number":"US-8477556","title":"Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines","assignee":null,"inventors":[],"filing_date":"2011-07-26T00:00:00.000Z","publication_date":"2013-07-02T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":16,"abstract":"Various embodiments are disclosed relating to a memory circuit architecture. In an example embodiment, which may accommodate a change to a new memory size or cell aspect ratio, while migrating between different process nodes or the same process generation, while retaining at least a portion of the periphery circuitry, a memory circuit architecture may be employed in which the memory array is divided into an upper half and a lower half, thereby splitting the cache Ways among the two halves. The wordline may be split among the two array halves, with each half driven by a half wordline driver. Also, in another embodiment, two sets of bitlines may be provided for each column, including a contacted set of bitlines and a feed-through set of bitlines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines","description":"Various embodiments are disclosed relating to a memory circuit architecture. In an example embodiment, which may accommodate a change to a new memory size or cell aspect ratio, while migrating between","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8477556","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8477556","citation_suggestion":"Patentable. \"Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines\" (US-8477556). https://patentable.app/patents/US-8477556","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8477556","json":"https://patentable.app/api/llm-context/US-8477556","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:46:04.411Z"}