{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8482325","patent":{"patent_number":"US-8482325","title":"Reducing an EMI effect by preventing the diffuse width with the SSCG from being limited by the jitter standard value in a structure in which a PLL circuit is mounted","assignee":null,"inventors":[],"filing_date":"2012-12-27T00:00:00.000Z","publication_date":"2013-07-09T00:00:00.000Z","cpc_codes":["G06F","G06K","G06K"],"num_claims":3,"abstract":"A disclosed image forming apparatus includes a recording unit which records image data on a recording medium; a first spread spectrum clock generator receiving a first clock signal, providing the first clock signal with frequency diffusion to have a first predetermined frequency diffusion width, and outputting a second clock signal; a PLL circuit outputting a third clock signal synchronously oscillating at a frequency obtained by multiplying the frequency of the first clock signal; an image processing unit receiving the third clock signal, and outputting the processed image data in synchronism with the third clock signal; a speed conversion unit receiving the second and third clock signals, and receiving and outputting the image data in synchronism with the second clock signal; and an input and output control unit outputting the image data to the recording unit in synchronism with the second clock signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reducing an EMI effect by preventing the diffuse width with the SSCG from being limited by the jitter standard value in a structure in which a PLL circuit is mounted","description":"A disclosed image forming apparatus includes a recording unit which records image data on a recording medium; a first spread spectrum clock generator receiving a first clock signal, providing the firs","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8482325","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8482325","citation_suggestion":"Patentable. \"Reducing an EMI effect by preventing the diffuse width with the SSCG from being limited by the jitter standard value in a structure in which a PLL circuit is mounted\" (US-8482325). https://patentable.app/patents/US-8482325","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8482325","json":"https://patentable.app/api/llm-context/US-8482325","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T12:45:05.006Z"}