{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8483006","patent":{"patent_number":"US-8483006","title":"Programmable addressing circuitry for increasing memory yield","assignee":null,"inventors":[],"filing_date":"2011-09-16T00:00:00.000Z","publication_date":"2013-07-09T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":16,"abstract":"Integrated circuits with memory elements are provided. A memory element may include a storage circuit coupled to data lines through access transistors. The access transistors may have gates that are controlled by an address signal. The address signal may be asserted during read/write operations to turn on the access transistors so that read/write data can be passed through the access transistors. The voltage level to which the address signal is raised during read/write operations may be adjusted using programmable voltage biasing circuitry. A number of integrated circuits may be tested during device characterization procedures to determine the amount by which the address signal should be adjusted using the programmable voltage biasing circuit so that the memory elements in the integrated circuits satisfy design criteria."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Programmable addressing circuitry for increasing memory yield","description":"Integrated circuits with memory elements are provided. A memory element may include a storage circuit coupled to data lines through access transistors. The access transistors may have gates that are c","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8483006","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8483006","citation_suggestion":"Patentable. \"Programmable addressing circuitry for increasing memory yield\" (US-8483006). https://patentable.app/patents/US-8483006","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8483006","json":"https://patentable.app/api/llm-context/US-8483006","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:59:57.181Z"}