{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8484519","patent":{"patent_number":"US-8484519","title":"Optimal programming levels for LDPC","assignee":null,"inventors":[],"filing_date":"2012-07-19T00:00:00.000Z","publication_date":"2013-07-09T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C","G11C","G11C"],"num_claims":23,"abstract":"The subject disclosure describes a method for reducing a sector error rate in a flash memory device, the method comprising, identifying a first program verify level having a first value, selecting an adjustment value for the first program verify level and programming the adjustment value to the first program verify level to replace the first value and to shift a first programming distribution associated with the first program verify level, wherein the shift in the first programming distribution is associated with a decrease in a sector error rate, wherein the shift in the first programming distribution is associated with an increase in a bit error rate. A flash storage device and computer-readable media are also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Optimal programming levels for LDPC","description":"The subject disclosure describes a method for reducing a sector error rate in a flash memory device, the method comprising, identifying a first program verify level having a first value, selecting an ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8484519","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8484519","citation_suggestion":"Patentable. \"Optimal programming levels for LDPC\" (US-8484519). https://patentable.app/patents/US-8484519","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8484519","json":"https://patentable.app/api/llm-context/US-8484519","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T00:37:51.631Z"}