{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8484589","patent":{"patent_number":"US-8484589","title":"Logical repartitioning in design compiler","assignee":null,"inventors":[],"filing_date":"2011-10-28T00:00:00.000Z","publication_date":"2013-07-09T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":20,"abstract":"During a pop phase of hierarchical repartitioning of an IC design, all cells within a current hierarchy may be identified, the list of cells may be ungrouped to dissolve the current hierarchy, one or more specified cells may be removed from the list of cells, where the specified one or more cells are to be moved to a different hierarchy, and the new list of cells without the specified one or more cells may be re-grouped, to re-form the previously dissolved hierarchy. During a push phase of the hierarchical repartitioning, all cells within the next lower-level hierarchy may be identified, the identified list of cells may be ungrouped to dissolve that hierarchy, the specified one or more cells may be added to the identified list of cells, and the new list of cells that includes the specified one or more cells may be grouped to reform the previously dissolved hierarchy."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Logical repartitioning in design compiler","description":"During a pop phase of hierarchical repartitioning of an IC design, all cells within a current hierarchy may be identified, the list of cells may be ungrouped to dissolve the current hierarchy, one or ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8484589","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8484589","citation_suggestion":"Patentable. \"Logical repartitioning in design compiler\" (US-8484589). https://patentable.app/patents/US-8484589","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8484589","json":"https://patentable.app/api/llm-context/US-8484589","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:56:07.006Z"}