{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8489058","patent":{"patent_number":"US-8489058","title":"Receiver, system, and memory with memory protection during power supply transitions","assignee":null,"inventors":[],"filing_date":"2011-06-21T00:00:00.000Z","publication_date":"2013-07-16T00:00:00.000Z","cpc_codes":["H04W","H04B"],"num_claims":20,"abstract":"A receiver includes a memory, processing circuitry, and a memory protection unit. The processing circuitry is coupled to the memory, and has an input for receiving a radio frequency (RF) signal, and an output for providing an output signal at another frequency. The processing circuitry includes one or more independently powered components adapted to write data to the memory. The memory protection unit is coupled to the memory, and monitors a power supply voltage level corresponding to each independently powered component and, if the power supply voltage level changes during a power supply transition of an independently powered component in which the power supply voltage remains sufficiently large to power the independently powered component, to prevent write operations received from a corresponding one of the one or more independently powered components from occurring at least while the power supply voltage level is changing."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Receiver, system, and memory with memory protection during power supply transitions","description":"A receiver includes a memory, processing circuitry, and a memory protection unit. The processing circuitry is coupled to the memory, and has an input for receiving a radio frequency (RF) signal, and a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8489058","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8489058","citation_suggestion":"Patentable. \"Receiver, system, and memory with memory protection during power supply transitions\" (US-8489058). https://patentable.app/patents/US-8489058","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8489058","json":"https://patentable.app/api/llm-context/US-8489058","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:40:15.193Z"}