{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8493774","patent":{"patent_number":"US-8493774","title":"Performing logic functions on more than one memory cell within an array of memory cells","assignee":null,"inventors":[],"filing_date":"2011-06-17T00:00:00.000Z","publication_date":"2013-07-23T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":20,"abstract":"A circuit structure is provided for performing a logic function within a memory. A plurality of read word line transistors are provided that receive a read word line signal and, upon receiving the read word line signal, the plurality of read word line transistors provide a path from a plurality of bit-line transistors associated with a plurality of physically adjacent memory cells to a read bit-line. In response to an associated memory cell within the memory storing a first value, each of the plurality of read bit-line transistors turns on and provides a path to ground thereby causing a first output value to be output on the read bit-line. In response to all of the plurality of memory cells storing a second value, the plurality of read bit-line transistors turn off thereby preventing a path to ground and a second output value is output on the read bit-line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Performing logic functions on more than one memory cell within an array of memory cells","description":"A circuit structure is provided for performing a logic function within a memory. A plurality of read word line transistors are provided that receive a read word line signal and, upon receiving the rea","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8493774","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8493774","citation_suggestion":"Patentable. \"Performing logic functions on more than one memory cell within an array of memory cells\" (US-8493774). https://patentable.app/patents/US-8493774","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8493774","json":"https://patentable.app/api/llm-context/US-8493774","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:56:43.952Z"}