{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8493790","patent":{"patent_number":"US-8493790","title":"NAND with back biased operation","assignee":null,"inventors":[],"filing_date":"2011-11-30T00:00:00.000Z","publication_date":"2013-07-23T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":19,"abstract":"Methods of programming, reading and erasing memory cells are disclosed. In at least one embodiment, program, sense, and erase operations in a memory are performed with back biased operation, such as to improve high voltage device isolation and cutoff in string drivers and bit line drivers, and no nodes of the circuitry are biased at zero volts."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"NAND with back biased operation","description":"Methods of programming, reading and erasing memory cells are disclosed. In at least one embodiment, program, sense, and erase operations in a memory are performed with back biased operation, such as t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8493790","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8493790","citation_suggestion":"Patentable. \"NAND with back biased operation\" (US-8493790). https://patentable.app/patents/US-8493790","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8493790","json":"https://patentable.app/api/llm-context/US-8493790","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:21:10.800Z"}