{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8494011","patent":{"patent_number":"US-8494011","title":"Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values","assignee":null,"inventors":[],"filing_date":"2012-09-13T00:00:00.000Z","publication_date":"2013-07-23T00:00:00.000Z","cpc_codes":["H04J","H04J"],"num_claims":9,"abstract":"An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values","description":"An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination mo","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8494011","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8494011","citation_suggestion":"Patentable. \"Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values\" (US-8494011). https://patentable.app/patents/US-8494011","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8494011","json":"https://patentable.app/api/llm-context/US-8494011","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:49:55.724Z"}