{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8495307","patent":{"patent_number":"US-8495307","title":"Target memory hierarchy specification in a multi-core computer processing system","assignee":null,"inventors":[],"filing_date":"2010-05-11T00:00:00.000Z","publication_date":"2013-07-23T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":16,"abstract":"Target memory hierarchy specification in a multi-core computer processing system is provided including a system for implementing prefetch instructions. The system includes a first core processor, a dedicated cache corresponding to the first core processor, and a second core processor. The second core processor includes instructions for executing a prefetch instruction that specifies a memory location and the dedicated local cache corresponding to the first core processor. Executing the prefetch instruction includes retrieving data from the memory location and storing the retrieved data on the dedicated local cache corresponding to the first core processor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Target memory hierarchy specification in a multi-core computer processing system","description":"Target memory hierarchy specification in a multi-core computer processing system is provided including a system for implementing prefetch instructions. The system includes a first core processor, a de","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8495307","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8495307","citation_suggestion":"Patentable. \"Target memory hierarchy specification in a multi-core computer processing system\" (US-8495307). https://patentable.app/patents/US-8495307","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8495307","json":"https://patentable.app/api/llm-context/US-8495307","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:36:47.602Z"}