{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8495395","patent":{"patent_number":"US-8495395","title":"Mechanism for controlling power consumption in a processing node","assignee":null,"inventors":[],"filing_date":"2010-09-14T00:00:00.000Z","publication_date":"2013-07-23T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":20,"abstract":"A system includes a plurality of processor cores and a power management unit. The power management unit may be configured to independently control the performance of the processor cores by selecting a respective thermal power limit for each of the plurality of processor cores dependent upon an operating state of each of the processor cores and a relative physical proximity of each processor core to each other processor core. In response to the power management unit detecting that a given processor core is operating above the respective thermal power limit, the power management unit may reduce the performance of the given processor core, and thereby reduce the power consumed by that core."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Mechanism for controlling power consumption in a processing node","description":"A system includes a plurality of processor cores and a power management unit. The power management unit may be configured to independently control the performance of the processor cores by selecting a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8495395","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8495395","citation_suggestion":"Patentable. \"Mechanism for controlling power consumption in a processing node\" (US-8495395). https://patentable.app/patents/US-8495395","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8495395","json":"https://patentable.app/api/llm-context/US-8495395","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:15:55.267Z"}